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Senior/Engineer Design for Testability Engineering for Digital and Mixed Signal Communication Ics | [查看更多类似职位] |
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工作地点 |
北京 |
发布日期 |
2008-06-17 |
工作年限 |
1年经验 |
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薪水范围 |
面议 | 学历要求 | 本科 |
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| 职位描述 |
职位类别： 电子/半导体/仪表仪器 计算机软、硬件/互联网/IT 工作地点： 北京 发布日期： 2008-01-24 工作经验： 1-3年 最低学历： 本科 管理经验： 否 工作性质： 全职 招聘人数： 若干 职位描述/要求： 德国INFINEON(英飞凌)公司（新加坡） 工作地点：新加坡 Division: Research&Development Job title: Senior/Engineer Design for Testability Engineering for Digital and Mixed Signal Communication ICs The Job: Definition / generation of Design-for-Testability concept, ensure testability (DFT) and analyzability (DFA) of VLSI communication devices. Development, implementation and verification of DFT / DFA measures (standard DFT measures as well as project specific non standard DFT measures). Test mode definition / documentation / implementation / verification. Test pattern generation / verification. Responsibility for achievement of target structural test coverage. Development of new DFT methods / features. Increase DFT knowledge base, drive know-how exchange across projects and other locations. Requirements: Masters/Bachelor Degree in Electrical/Electronics Engineering. Minimum of 3 years of working experience in DFT engineering. Good knowledge in Boundary Scan, ATPG Scan, and MBIST is a must. Working experience with industry standard tools like Fast Scan, EDT, DF advisor, DFT Compiler is an added advantage. Knowledge in complete design flow is desired. Proficiency in VHDL/Verilog is desired. Proficient in high level programming languages “C”, “C++”, Perl and script writing. Experience in Test development and Product engineering will be an added advantage. A team player with an open and co-operative personality. Good communication, analytical and problem-solving skills. 联系方式： 工作地点：新加坡 请写明应聘职位名称，详细中英文简历 ，邮件请寄 usa@ceiec.com.cn 公司名称：中国电子国际经济合作公司 联系电话：010-68296333 联系人：边女士 请注明你所要申请的职位。 请注明你的户口所在地。 请在应聘材料上标明，此职位的信息来源于zhaopin.com 。 .
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