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Media-IP development design engineer, VLSI | [查看更多类似职位] |
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工作地点 |
四川成都 |
发布日期 |
2008-03-24 |
工作年限 |
3年经验 |
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薪水范围 |
面议 | 学历要求 | 本科 |
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| 职位描述 |
职位描述(Job Descriptions) Job Responsibilities:-Developing and verifying Media-IP cores for STB/IPTV SoC products, such as video compression/decompression and pre/post-processing cores. -Designing FPGA based prototype system for verification and demonstration of media-IP cores -Cooperating with VLSI engineers to integrate silicon IP cores into SoC products. -Working with hardware, software and test engineers to improve the performance of the final product Job Requirements:-Master degree or Bachelor degree with four years working experience in Electronics Engineering or equivalent with good records in information technology, digital signal processing or relevant subjects -Good understanding of digital circuit design, VLSI architecture and design re-use methodology -Skillful in RTL (Verilog or VHDL) module design and having experience with FPGA development -Familiar with VLSI front-end design tools, such as Verilog simulator, Design Compiler, static timing analyzer, etc -C/C++ programming capability is a plus -Good written/verbal communications skills in Chinese and English -Willing to take ownership of resolving problems, being self-motivated, hard-working and good team player .
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