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Sr. 3D Logic Design Engineer | [查看更多类似职位] |
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工作地点 |
上海 |
发布日期 |
2008-04-18 |
工作年限 |
3年经验 |
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薪水范围 |
面议 | 学历要求 | 本科 |
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| 职位描述 |
职位类别： 计算机软、硬件/互联网/IT 工作地点： 上海 发布日期： 2008-03-06 工作经验： 3-5年 最低学历： 本科 管理经验： 否 工作性质： 全职 招聘人数： 1人 职位描述/要求： DESCRIPTION OF DUTIES IN ADDITION TO THOSE IN JOB DESCRIPTION: - Develop design micro-architecture specification for graphic engine implementation - Write RTL code in Verilog HDL and Verification - Perform ASIC synthesis, netlist generation, block and chip level timing analysis Guide Physical Place and Route. PREFERRED EXPERIENCE: - MSEE with 3+year or BSEE with 4-6 years of industry experience in deep submicron CMOS full chip design and functional verification. - Expertise with HDL and design of high speed and high complexity digital logic required - Experience with Integration and Place and Route(a plus) - Expertise of Computer Architecture and computer Arithmetic (a plus) - Expertise of Computer Graphic and HW implementation(a plus) DDR-SDRAM/PCI/PCI-e experience(a plus) 联系方式： .
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