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CIG-R: Senior Verification Engineer | [²é¿´¸ü¶àÀàËÆÖ°Î»] |
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ְλÀà±ð£º ¼ÆËã»úÈí¡¢Ó²¼þ/»¥ÁªÍø/IT ¹¤×÷µØµã£º ÉϺ£ ·¢²¼ÈÕÆÚ£º 2008-02-19 ¹¤×÷¾Ñ飺 1-3Äê ×îµÍѧÀú£º ±¾¿Æ ¹ÜÀí¾Ñ飺 ·ñ ¹¤×÷ÐÔÖÊ£º ȫְ ÕÐÆ¸ÈËÊý£º 1ÈË Ö°Î»ÃèÊö/ÒªÇó£º Job Description Lead the verification process of communication and consumer SoCs. Responsible for verification planning, test cases, simulation environment build-up, testbench coding, automation scripts, debugging, and participation in lab bring up activities. Job Requirement -Requires a BSEE or BS in CS, related field or equivalent experience -Experience with Verilog/VHDL and at least one Hardware Verification Language, such as System C, Specman, or Vera, SystemVerilog preferred -Solid experience with constrained random verification methodologies, including related coverage methodology -Solid experience with the C/C++ programming -Must have good communication skills and the demonstrated ability to work in a team-oriented environment in a positive, productive manner. ÁªÏµ·½Ê½£º Email: cig_hr@ci-g.com Address: Building 4, 3/F, Block D,889,Yishan Rd., Shanghai 200233,China .
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